Meet Godfried, the PPG

Above the prototype of Godfried, the PPG. PPG means Polyrhythmic Pattern Generator – not what you were thinking.

The story behind goes something like this: i LOVE selfplaying patches. But i was badly lacking an elegant Master Clock Module with nice big start and stop buttons. OK, actually i have one, but its a bit to big to lug around. So i decided to make one myself, that narcistically fits my needs: BIG Buttons for my ever aging Wurstfinger, easy to to set up, best with a nice display, memory for the patches, as small as possible and most important: a precise timing. Did i say i am a timing afficionado? And no way i would want to dispense the Circlon’s phantastic PRH feature.

And after a “bit” playing around it developed into this:

A 30 bpm – 300 bpm Master Clock with +- 0,0001s accuracy, that can be synced externally (as though i would not recommend this. Its meant as Master Clock / StartStop module in the end….)

6 Trigger Channels driven by the Master Clock, that can play either

• command Signals like Start, Stop, Reset etc….
• Clock Signals derived from the Master clock
• XOX style sequencer patterns up to 64 Steps
• Euclidean sequencer patterns

All of the above (well, except the command Signals….) are real polyrhythmic, so your pattern with x steps will play the same time as y beats from the Master Clock. Trigger Outputs are +8V.

Additionally (as there was an unused but nice D/A in the used Teensy 3.2 board, 2 unused OpAmp cells and some free PCB real estate…) there is a CV track that plays a CV pattern of up to 64 steps, also polyrhythmic and possibly quantizeable (yet to implement). CV ranges from 0-4,85V with 12 Bit resolution.

As soon as i figure out what swing means in a polyrhytmic context i’ll also implement this – if you have any ideas about this i’d be pleased to hear from you!

A crispy 128×64 OLED allows for a nice graphical user interface, that makes editing easy despite the fact there is only a single encoder plus one “Escape” button and a 512k eeprom provides plenty of memory. I managed to squeeze all of this into 6HP.

Currently i built the prototype in the Pic above and are in the stage of completely rewriting the Firmware to accomodate Data Structures to possible future features. Or – seen more realistically – clean up the mess from the brainstorming phase.

A new revision of PCBs is already ordered and as soon as i consider the Firmware as good enough DIY kits for this will be available.

Feel free to share your thoughts here, or – if you are brave – apply as a BetaTester. But only if you are *really* brave.